2025 ASIC Physical Design Engineer Intern, Annapurna Labs

About the position

Amazon Web Services (AWS) internships are full-time (40 hours/week) for 12 consecutive weeks during summer. By applying to this position, your application will be considered for all locations we hire for in the United States. In Annapurna Labs we are at the forefront of hardware co-design not just in Amazon Web Services (AWS) but across the industry. The work we do is cutting-edge and internet-scale while also being deeply important to our customers. We design and build every component of our hardware and software to come together into products that our customers use for accelerated computing: either Machine Learning acceleration, or FPGA acceleration. We get our hands dirty, from creating our own silicon, pushing the electrons in the right direction, ensuring our hardware is functional and healthy, and managing the full lifecycle of our systems at the huge scale and complexity of AWS. If you're interested in 'building a complete product' from inception to delighted customers, Annapurna is a fantastic choice. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of Software and Hardware in our data centers including technologies such as AWS Inferentia, which is a machine learning inference accelerator designed to deliver high performance at low cost. If this sounds exciting to you - come build the future with us!

Responsibilities

• Perform physical design for Amazon's machine learning custom silicon solutions
• Participate in various aspects of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical verification
• Write Tcl or PERL scripts to improve physical design flows and methods
• Collaborate with RTL, DFT designers to ensure high quality design implementation

Requirements

• Enrolled in a Bachelors' degree program or higher in Electrical Engineering, Computer Engineering, or a related field with a graduation conferral date between December 2025 and September 2026
• Scripting internship/project experience with Python, Perl or equivalent
• Strong understanding of VLSI circuit design fundamentals
• Have taken at least one or more VLSI circuit design and implementation classes and done lab projects

Nice-to-haves

• Enrolled in a Master's degree program in Electrical Engineering or Computer Engineering
• Previous relevant technical internship experience
• Experience with FinFET design, Clock/Power Distribution, Spice Circuit analysis
• Experience with Place and Route, digital implementation
• Experience with EDA tools from Synopsys (ICC2, DC, PT), Cadence (Genus, Innovus, Voltus)
• Experience with Verilog/SystemVerilog

Benefits

• Full range of medical, financial, and/or other benefits
• Equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package