ASIC Engineer, Machine Learning Architecture

About the position

Meta Platforms Inc. is seeking an ASIC Engineer, Architecture to join our Infrastructure organization. This organization is responsible for building and maintaining the data centers that host all of our services - Facebook, Instagram, WhatsApp etc. These servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. In this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/ML experts in the company, to evaluate algorithms, develop functional and performance models and help architect state-of-the-art machine learning ASICs. Come work and learn alongside our expert engineers to build 'Green' data center accelerators.

Requirements

• Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
• Currently has, or is in the process of obtaining a Master's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
• Computer architecture coursework that has covered concepts such as microprocessor architecture, memory systems and on-chip interconnection networks.
• 2+ years of experience with programming skills in C, C++, Python or other Object Oriented Programming Language.
• Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.
• Currently has, or is in the process of obtaining, a PhD degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
• Experience and knowledge in machine learning architectures and frameworks.
• Experience in analyzing and driving power versus performance trade-offs in ASIC design.