Post Silicon Validation and Application Engineer (Design)

Full-time - Mid Level

Hybrid - San Jose, CA

Publishing Industries

About the position

This role will work onsite out of our San Jose, CA office. The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, verification engineers, and interact with cross-functional software and product teams, working together to ensure the successful deployment of the ASIC in products.

Responsibilities

• ASIC Bringup, Test plan development, and Post silicon validation.
• Understand the microarchitecture, design details, and code so that issues can be triaged and debugged faster.
• Work closely with internal and external system teams to make sure the ASIC is configured correctly and performing as expected.
• Work with hardware and software teams to triage and root cause system, SDK/Software, and customer failures.
• Continuously monitor and prioritize incoming support requests during productization and improve overall quality and efficiency.

Requirements

• Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design experience.
• Demonstrated experience in digital design, systems and microarchitecture. Deep understanding of SW/firmware and HW/SW interaction.
• Experience with System Verilog programming, and Scripting (Python, Perl, TCL, shell programming).
• Implementation knowledge of networking and network protocols - Routers, Switches, Schedulers, Buffers, Traffic Manager etc.
• Experience with ASIC micro-architecture and design, Silicon bring-up, and Post silicon validation.

Nice-to-haves

• Master's degree in Electrical or Computer engineering and 5+ years of ASIC Design experience.
• Strong C/C++ skills.
• Ability to communicate technical concepts to audiences spanning executives to junior engineers.
• Capable of working in a constantly evolving environment without losing focus.
• Excellent problem-solving, teamwork, and interpersonal skills.

Benefits

• Quality medical, dental and vision insurance.
• 401(k) plan with a Cisco matching contribution.
• Short and long-term disability coverage.
• Basic life insurance.
• Numerous wellbeing offerings.
• Up to twelve paid holidays per calendar year.
• Flexible Vacation Time Off policy.
• Sick Time Off policy with 80 hours provided on hire date.
• Paid time away to deal with critical or emergency issues.
• Additional paid time to volunteer and give back to the community.