As a Hardware and Silicon Validation Staff Engineer at Marvell, you'll be helping to deliver high bandwidth over long distances. You will contribute as part of the system engineering team, engaging with functional teams such as digital, analog, and firmware to develop Marvell's next generation high-speed networking PHY Serdes IP/ICs. You will work independently and collaboratively in the post-silicon validation team, collecting and analyzing massive data from the bench and driving tuning parameters in silicon to ensure product quality. Your role will involve characterizing electrical parameters and building blocks such as Tx jitters, CDR loops, CTLE, PLL, etc. You will tune internal circuitries such as peaking, bandwidth, FIFO, and adaptation algorithms to optimize the product's operating margin at stressed PVT conditions. Additionally, you will be involved in system-level hardware (PCB schematics) and work with SI and layout teams to build engineering boards. You will also create, maintain, and own bench automation libraries (Python) for various products. At Marvell, we value your ideas, and your work will have a direct impact on the company's products.
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