Advanced IC Package Designer

Valtix - San Jose, CA

Hybrid - San Jose, CA

Publishing Industries

About the position

Cisco Silicon One is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world's most complex networks and carry over 90% of IP traffic. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. The Cisco SiliconOne ASIC team is looking for an advanced IC package designer to help us develop our next generation silicon and platforms. You will work on cutting-edge FCBGA substrates that push the boundaries on power, speed, and fabrication / assembly technology. You will drive package planning & layout to enable on-time, high-quality manufacturing releases. You will be a proficient learner, you will actively implement new technologies and rules, and you will excel in documenting and communicating critical information to the team.

Responsibilities

• Collaborate with ASIC and Physical Design teams to evaluate and develop floorplans that result in optimal substrate integration
• Work with multi-disciplinary teams (system, thermal, mechanical, connector) to understand needs and to create guidance for package implementation
• Plan substrate designs, including stackups, materials, and design rules, optimized to meet stringent Signal Integrity and Power Integrity rules
• Implement package routing with fabrication/assembly aware approach
• Design and build power connectivity structures for high power applications
• Drive designs towards successful, on-time completion while meeting important milestones
• Contribute to team design reviews with actionable feedback to improve quality, capability, and experience of teammates
• Negotiate with external manufacturing partners to specify and build best-in-class packages that meet stringent performance and test criteria

Requirements

• Degree in Electrical Engineering or related field, or equivalent experience
• 4+ years in the industry with IC Package or PCB development
• Fluent in Cadence Allegro Package Designer
• Strong communication and documentation skills

Nice-to-haves

• Fluent in Orbit IO
• Fluent in Calibre for DRC verification
• Experience with 2.5D package design, including wafer level fan-out
• Experience with very large pin count packages or equivalent PCBs
• Familiarity with AutoCAD
• Working knowledge of Signal and Power Integrity fundamentals

Benefits

• Quality medical, dental and vision insurance
• 401(k) plan with a Cisco matching contribution
• Short and long-term disability coverage
• Basic life insurance
• Numerous wellbeing offerings
• Up to twelve paid holidays per calendar year
• Floating holiday
• Birthday day off
• Vacation time off (up to 16 days per year for non-exempt new hires)
• Flexible Vacation Time Off policy for exempt new hires
• Sick Time Off policy with 80 hours provided on hire date
• Paid time away for critical or emergency issues
• Additional paid time to volunteer and give back to the community