Analog Design Architect

Cadence Design Systems - San Jose, CA

Full-time - Senior

San Jose, CA

Professional, Scientific, and Technical Services

About the position

The Principal Analog IC Designer at Cadence is a pivotal role that involves the design and development of analog and mixed-signal integrated circuit (IC) blocks. This position encompasses the entire design process, starting from the initial concept and specification phase, all the way through to the final verification to ensure that the designs meet customer specifications. The ideal candidate will have a strong background in CMOS SerDes or high-speed I/O IC design, with a minimum of 7 years of relevant experience. This role is critical in advancing Cadence's technology offerings and requires a deep understanding of various technical aspects related to analog design. In this position, the designer will be expected to have a working knowledge of common SerDes standards and their electrical requirements, which is considered a significant advantage. A thorough understanding of jitter and signal equalization techniques is essential, as these are critical components in ensuring the performance and reliability of the IC designs. The candidate will also need to demonstrate proficiency in designing various SerDes circuit blocks, including but not limited to Drivers, Receivers, Serializers, Deserializers, Phase Interpolators, Low Jitter PLLs, High-Speed Clock Distribution, ADCs, DACs, Bias and Bandgap references, and Voltage Regulators. The role demands excellent problem-solving skills and analog aptitude, along with strong communication skills to facilitate effective collaboration within a team environment. Proficiency in using CAD tools for circuit simulation, layout, and physical verification is a must. Experience with Cadence tools, lab testing, and design experience at speeds greater than 10Gbps will be highly beneficial for success in this role.

Responsibilities

• Design and develop analog/mixed signal IC circuit blocks from initial concept to final verification.
• Ensure designs conform to customer specifications and industry standards.
• Utilize CAD tools for circuit simulation, layout, and physical verification.
• Collaborate with team members to solve design challenges and improve processes.
• Conduct lab tests to validate design performance and functionality.

Requirements

• Minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
• Thorough understanding of jitter and signal equalization techniques.
• Proficient design experience in various SerDes circuit blocks such as Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, ADC, DAC, Bias and Bandgap, and Voltage Regulators.
• Excellent problem-solving skills and analog aptitude.
• Strong communication skills and ability to work cooperatively in a team environment.
• Proficiency in using CAD tools for circuit simulation, layout, and physical verification.

Nice-to-haves

• Working knowledge of common SerDes standards and their electrical requirements.
• Experience with Cadence tools and lab testing.
• Design experience at speeds greater than 10Gbps.

Benefits

• Health insurance coverage
• 401k retirement savings plan
• Paid holidays and vacation time
• Professional development opportunities
• Flexible scheduling options