ASIC Digital Design Engineer

$122,000 - $182,000/Yr

Synopsys - Sunnyvale, CA

Full-time - Mid Level

Sunnyvale, CA

Publishing Industries

About the position

Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesi gned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. As a Senior ASIC Digital Design Engineer, you will join Synopsys Solution Group, DDRPHY IP team to innovate and develop the latest world-class market-leading DesignWare DDRPHY IP solution. The DDR IP is a staple of the mixed-signal IP market, and Synopsys is the leading provider of DDR IP products. All current and next-generation technologies are being developed by the DDR IP team, both digital and analog components, complement each other in creating a high-performance, high-bandwidth, low-latency and low-power product.

Responsibilities

• Digital microarchitecture definition and documentation
• RTL logic design, debug, and verification for best timing, area, and power

Requirements

• BS/MS in Electronics Engineering with at least 5 years of design experience
• Experience with synthesizable Verilog and System Verilog design concepts and implementation
• Experience with front-end design flows such as linting, synthesis, timing investigation and closure, cross-domain clocking, DFT, and power optimization techniques
• Exhibit excellent communication skills and be self-motivated
• Understanding of DDR memory and DDRPHY architecture is a plus

Benefits

• Comprehensive health benefits
• Wellness benefits
• Financial benefits
• Annual bonus eligibility
• Equity and other discretionary bonuses