ASIC Engineer, Design

Meta - Sunnyvale, CA

Full-time - Senior

Sunnyvale, CA

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About the position

Meta is seeking experienced ASIC Design Engineers to join our Infrastructure organization, focusing on the development of advanced ASICs for applications such as machine learning, video transcoding, and network acceleration. The role involves significant collaboration across teams to ensure the successful design and implementation of complex SoCs and IPs for data center applications.

Responsibilities

• Architecture exploration
• Micro-architecture development
• RTL development using Verilog, System Verilog and HLS
• Soft and hard IP identification, selection and integration
• Collaboration with verification and emulation teams in test plan development and debug
• Collaboration with implementation team to close the design on timing and power

Requirements

• 15+ years of experience in micro-architecture and RTL development for complex control and data path IPs
• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• Experience in leading complex SOCs or IP subsystems

Nice-to-haves

• Experience in data path development
• Experience in CPU, Network protocols, NOC, Memory and Peripheral Subsystems
• Experience with Synthesis, Timing Closure and Formal Verification Methodology
• Master's or PhD degree in Electrical Engineering, Computer Science or related areas