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About the position
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Responsibilities
- Architect block, cluster and top level DV environment infrastructure
- Create DV infrastructure from scratch for block, cluster and top level environments
- Maintain existing DV environments and enhance them for new features and requirements
- Ensure complete verification coverage through implementation and review of code and functional coverage
- Work closely with designers
- Support tests done with emulation
- Work closely with software teams and debug issues found during firmware development and be responsible for ASIC bring up
Requirements
- 7+ years ASIC design verification experience with a bachelor's or master's degree
- Prior experience with ASIC verification using UVM/System Verilog
- Prior experience in verifying complex blocks, clusters and top level for SoC
- Prior experience building test benches from scratch, hands on experience with System Verilog constraints, structures and classes
- Prior experience with cross-functional teams, and possess the drive to learn and grow
- Prior experience on one or more protocols - PCIe, Ethernet, RDMA, TCP
Nice-to-haves
- Prior experience leading a team of engineers to complete verification of a complex block, cluster or chip-level design
- Lead verification for a complete SOC or ASIC
- Prior Experience with Forwarding logic/Parsers/P4
- Formal verification (iev/vc formal) knowledge
Benefits
- Quality medical, dental and vision insurance
- 401(k) plan with a Cisco matching contribution
- Short and long-term disability coverage
- Basic life insurance
- Numerous wellbeing offerings
- Up to twelve paid holidays per calendar year
- Flexible Vacation Time Off policy
- Sick Time Off policy with 80 hours provided on hire date
- Paid time away to deal with critical or emergency issues
- Additional paid time to volunteer and give back to the community
