ASIC Engineering Technical Leader

About the position

Cisco Silicon One (#CiscoSiliconOne) brings together networking, compute and storage all in a single system. Come join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, Security etc.). Our Hardware and Software solutions are tightly coupled with the development cycles that give us an unparalleled advantage in enabling our customers adopt the latest what technology can offer. As part of Cisco Silicon One (#CiscoSiliconOne) our team develops complex, high-performance, feature-rich ASICs used in Cisco's networking products and third-party custom-built hardware solutions.

Responsibilities

• Create micro-architecture specifications and participate in reviews
• Implement Verilog RTL to meet timing and performance requirements
• Help define, evolve, and support our design methodology
• Collaborate with the verification team on as-needed basis to address design bugs and close code coverage
• Work closely with physical design team to close design timing and place-and-route issues
• Triage, debug, and root cause simulation, software bring-up, and customer failures
• Perform diagnostic and post silicon validation tests in the lab

Requirements

• Bachelor's or a Master's Degree in Electrical or Computer Engineering, with 10+ years of related work experience
• Prior experience with developing Micro-Architecture for blocks
• Prior experience with Verilog/System Verilog
• Prior experience with Clock Domain, Reset Domain Crossing issues, and Low-Power Design Techniques
• Prior experience with simulators and waveform debugging tools
• Prior experience working with Linting, Synthesis and Static Timing Analysis tools
• Prior experience with Verification methodologies including experience developing testbenches, writing System Verilog Assertions and debugging Netlist simulations

Nice-to-haves

• Understanding of Networking technologies and concepts
• Experience with ARM protocols (AXI, CHI, APB, AHB) and exposure to ARM CPU's is desirable
• Design experience with Ethernet MAC, DDR/LPDDR, PCIE and DMA controllers is a plus
• Experience with Integrating 3rd party IP's into SoC is desirable
• Scripting experience (Python, Perl, TCL, shell programming) highly desirable
• Experience with Emulation and Formal Verification tools is a plus

Benefits

• Quality medical, dental and vision insurance
• 401(k) plan with a Cisco matching contribution
• Short and long-term disability coverage
• Basic life insurance
• Numerous wellbeing offerings
• Up to twelve paid holidays per calendar year
• Floating holiday and a day off for birthday
• Vacation time off policy with flexible limits for exempt employees
• Sick time off policy with 80 hours provided on hire date and annually
• Paid time away for critical or emergency issues
• Additional paid time to volunteer and give back to the community