ASIC Test Engineer

Talent Space - Santa Clara, CA

Full-time - Mid Level

Santa Clara, CA

Administrative and Support Services

About the position

The ASIC Test Engineer will be responsible for designing, debugging, and developing test programs and device interface boards for semiconductor devices. This role involves collaborating with cross-functional teams to optimize test processes and improve efficiency while ensuring high-quality production standards.

Responsibilities

• Design and debug device interface boards (DIB), probe cards, and test programs for device characterization, qualification, and production.
• Develop test programs for Advantest 93k tester.
• Assist with automation of test pattern development and conversion.
• Debug design and process-related yield and performance problems.
• Own the development process from design kick-off to production release.
• Interface with cross-functional Design and DFT teams to develop and implement test plans.
• Optimize test time and yield of Final Test (FT) Program and/or Electrical Wafer Sort Test Program (EWS).
• Develop new test techniques to improve test efficiency and reduce cost of test.
• Work with cross-functional engineering teams in failure analysis and defining corrective actions.
• Provide support for test program enhancements.

Requirements

• Bachelor of Science degree in Electrical Engineering.
• 3+ years of experience in a related field.
• Strong programming background in C++, Java, and Python.
• Experience with Advantest 93k tester.
• Working knowledge of basic analog and digital circuits.
• Excellent verbal and written communication skills.
• Self-driven, demonstrating ownership and initiative.
• Experience testing high-speed datacom integrated circuits (TIAs, laser drivers, CDRs) is highly desirable.
• PCB design and analysis experience with high-frequency/RF design & analysis is highly desirable.