ATE Test Engineer

$139,000 - $208,000/Yr

Ericsson - Elmsford, NY

posted 2 days ago

Elmsford, NY
Computer and Electronic Product Manufacturing

About the position

Ericsson Inc. does not sponsor US work authorizations for this job position including H-1B, O-1, and TN. Ericsson also does not hire F-1's working on EAD for this position. We are seeking a Test Engineer to join us and be a part of a new ASIC test team. This role will be integral to this test team and will be instrumental in all aspects of test strategy and silicon debug. Your efforts will ensure that the final ASIC achieves the program goals as we challenge the best in the world to extend our leadership position!

Responsibilities

  • Develop and implement test methodologies for Ericsson ASICs which involves analyzing chip specifications and understanding functional requirements to ensure comprehensive coverage of the chip's functionality.
  • Collaborate with colleagues and vendors on ATE test HW development by providing design requirements and reviewing schematics and layout for probe card, loadboard, socket, thermal control interface, etc.
  • Debug test programs on ATE required for qualification, characterization, and production.
  • Develop test method source code for Scan, MBIST, LBIST, Functional, etc. blocks.
  • Test flow development, including test numbering, power binning, high-voltage stress, etc.
  • Perform pattern conversion of WGL, STIL, VCD and eVCD formats to ATE.
  • Test program revision control using GIT.

Requirements

  • Meaningful experience in semiconductor test engineering of sophisticated ASICs or SOCs.
  • Possess extensive knowledge Advantest V93K / V93000 (preferred) or Teradyne Ultraflex.
  • Experience with HSSI (PCIe 5+, CPRI) or high-speed AD/DA test techniques.
  • Understanding of Scan, MBIST, LBIST, SERDES, and/or eFuse IPs.

Nice-to-haves

  • Linux, Java C++, Python/Perl, Ruby.
  • Data analysis techniques using MS Excel, JMP, YieldExplorer, SiliconDash, etc.
  • Knowledge of IEEE standards 1149.1, 1149.6, 1149.10, 1500, 1687, or 1838.
  • Streaming Scan Network (SSN), scan diagnostics, failure analysis techniques.
  • Test of 2.5D and 3D System-in-Package (SiP), chiplets, UCIE, etc.
  • PCB / schematic design including SI and PI knowledge.

Benefits

  • Equal employment opportunities (EEO) to all employees and applicants.
  • Support for the UN Guiding Principles for Business and Human Rights.
  • Support for the United Nations Global Compact.
  • Encouragement of a diverse and inclusive organization.
Job Description Matching

Match and compare your resume to any job description

Start Matching
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service