Automated Test Equipment Test Engineer, SoC, Platforms

$150,000 - $223,000/Yr

Google - Sunnyvale, CA

Full-time - Mid Level

Sunnyvale, CA

10,001+ employees

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About the position

The Automated Test Equipment Test Engineer will play a crucial role in shaping the future of AI/ML hardware acceleration at Google. This position involves developing and deploying comprehensive test solutions for System on Chips (SoC) that power Google's advanced data centers. The engineer will work on Automatic Test Equipment (ATE) for New Product Introduction (NPI) and High Volume Manufacturing (HVM), ensuring optimal test coverage and high-quality SoCs. The role requires collaboration with cross-functional teams to integrate SoC technologies into devices and validate performance through rigorous testing methodologies.

Responsibilities

• Participate in ATE test program development for High Volume Manufacturing and Characterization, working with ATE Vendors and internal cross-functional teams.
• Own IP-level test development for Design for Testing (DFT) structural tests, functional tests, or eFuse programming.
• Support Chip-level DFT test development for Automatic Test Pattern Generation (ATPG), Memory Built-In Self Test (MBIST), logic and memory diagnostics, logic redundancy analysis, or memory repair.
• Participate in developing and executing strategies for SoC Product NPI, bring-up, verification, characterization, and qualification support, including bench test, troubleshooting, test coverage optimization, new product Defective Parts per Million (DPPM) correlation, and product correlation between system and ATE.
• Provide back-stop support for production, including test program upgrade and release, volume data analytics, test time reduction and yield improvement, and Return Materials/Merchandise Authorization (RMA) analysis.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field, or equivalent practical experience.
• 5 years of experience in test engineering or product engineering.
• Experience in Application-Specific Integrated Circuit (ASIC) or SoC DFT test development, bring-up, or debug for NPI prototypes or High Volume Manufacturing.

Nice-to-haves

• Master's degree in Computer Science, Electrical Engineering, or in a related technical field.
• 10 years of experience in test engineering or product engineering.
• Experience with Automatic Test Equipment (ATE) platforms such as Advantest V93K or Teradyne UltraFlex.
• Experience with Scan/ATPG test development, especially with Streaming Scan Network (SSN)/Streaming Fabric techniques, or Memory BIST test development and repair scheme implementation, including BISR/BIRA.
• Experience Testing Internet Protocols (IP) such as Phase-locked Loops (PLL), Production Verification Testing (PVT) sensors, Temperature sensors, Process Monitor Ring Oscillator (PMRO), and eFuse.

Benefits

• Health insurance
• Dental insurance
• Vision insurance
• 401(k) plan
• Paid holidays
• Paid time off
• Employee stock purchase plan
• Tuition reimbursement
• Professional development opportunities
• Flexible scheduling
• Wellness programs