About The Position

The Design Verification Engineer position at Apple's Silicon Engineering Group offers an exciting opportunity to work on cutting-edge Cellular SoCs. This role is central to the verification efforts within the silicon design group, focusing on crafting and productizing advanced cellular solutions. The engineer will be responsible for integrating sophisticated IP level design verification environments, developing reusable UVM-based test benches, and implementing effective test suites to ensure high-quality chip delivery.

Requirements

  • BSEE or BSCS degree is required.
  • Experience in Object Oriented Programming.
  • Coursework in Digital Design.

Nice To Haves

  • MSEE, MSCS or beyond is preferred.
  • Coursework in Computer Architecture and Networking Protocol.
  • Programming experience in SystemVerilog, Python, C++.
  • Excellent communication and problem-solving skills.
  • Desire to seek diverse challenges.

Responsibilities

  • Contribute to the verification effort of complex SOCs delivering Cellular solutions.
  • Integrate multiple sophisticated IP level design verification environments.
  • Craft highly reusable best-in-class UVM based test benches.
  • Implement effective coverage driven and directed test suites.
  • Deploy new tools and methodologies to ensure right-first-time chip delivery.
  • Collaborate with other product development groups across Apple to enhance cellular systems.

Benefits

  • Equal opportunity employer committed to inclusion and diversity.
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