CPU Microprocessor Design Engineer

Apple - Beaverton, OR

Full-time - Senior

Beaverton, OR

Computer and Electronic Product Manufacturing

About the position

At Apple, we are at the forefront of innovation, and our Silicon Engineering Group (SEG) is no exception. We are seeking a talented RTL Engineer to join our dynamic team, where you will play a crucial role in the development of high-performance, low-power microprocessors that power our groundbreaking products. As an RTL Engineer, you will be responsible for the entire microarchitecture development process, starting from high-level architectural exploration to detailed specification. Your expertise will guide the RTL ownership, where you will develop, assess, and refine RTL designs to meet stringent power, performance, area, and timing goals. In this role, you will also support the validation process by developing test benches and simulations for functional and performance verification. You will explore high-performance strategies and ensure that the RTL design meets the targeted performance metrics. Collaboration is key, as you will work closely with a multi-functional engineering team to implement and validate the physical design, focusing on timing, area, reliability, testability, and power considerations. This position offers a unique opportunity to contribute to the next generation of Apple products, leveraging your skills in CPU architecture and microarchitecture.

Responsibilities

• Microarchitecture development and specification from early high-level architectural exploration through micro architectural research and arriving at a detailed specification.
• RTL ownership, including development, assessment, and refinement of RTL design to target power, performance, area, and timing goals.
• Support test bench development and simulation for functional and performance verification.
• Explore high performance strategies and validate that the RTL design meets targeted performance.
• Work with a multi-functional engineering team to implement and validate physical design on aspects of timing, area, reliability, testability, and power.

Requirements

• Minimum BS degree in a relevant field and 10+ years of relevant industry experience.
• Direct CPU RTL experience is essential.
• Thorough knowledge of microprocessor architecture, including expertise in instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, and cache and memory subsystems.
• Expertise in using Verilog and/or VHDL.
• Experience with simulators and waveform debugging tools.
• Expertise in logic design principles along with timing and power implications.
• Deep understanding of high performance and low power techniques and trade-offs in CPU microarchitecture.
• Experience working with cross-disciplinary teams to define CPU microarchitecture features.
• Experience in C or C++ programming is a plus.
• Experience using an interpretive language such as Perl or Python.

Nice-to-haves

• Experience in C or C++ programming is a plus.
• Experience using an interpretive language such as Perl or Python.