Design Engineering Architect

Cadence And Co - San Jose, CA

Full-time - Senior

San Jose, CA

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About the position

The Design Engineering Architect role at Cadence is a technical and project leadership position focused on developing innovative physical aware IP architectures. This role involves collaboration with IP design teams and silicon solution architects to optimize performance, power, and area (PPA) for Cadence's IP products. The position requires extensive experience in design tools and foundry technologies, as well as leadership in cross-functional team coordination to deliver industry-leading IPs for advanced technology nodes.

Responsibilities

• Work with IP design teams and silicon solution architects to develop new physical aware IP architectures.
• Collaborate with leading foundries such as TSMC, Samsung, and Intel to achieve optimal Performance/Power/Area (PPA) for Cadence IPs.
• Guide Cadence's worldwide physical design teams in following best design practices and methodologies.
• Manage cross-functional projects and coordinate with external companies to develop industry-leading IPs.
• Ensure thorough understanding and execution of full physical design flows including RTL Synthesis, floorplan, P&R, high performance clock-tree synthesis, static Timing analysis and closure, DFT, and low power design techniques.

Requirements

• 15+ years of experience in design tools and foundry technologies.
• Proven leadership in collaborating and coordinating cross-functional teams and external companies.
• Thorough understanding of full physical design flows including RTL Synthesis, floorplan, P&R, high performance clock-tree synthesis, static Timing analysis and closure, DFT, and low power design techniques.
• Deep knowledge and experience with Cadence tools/flows such as Genus, Innovus, Voltus, Tempus, Modus, Conformal-LP, and Pegasus.
• Strong communication and interpersonal skills.

Nice-to-haves

• Good knowledge of high performance interface PHYs and controllers.