Design Verification Engineer

$135,400 - $250,600/Yr

Apple - San Diego, CA

Full-time - Mid Level

San Diego, CA

Computer and Electronic Product Manufacturing

About the position

The Design Verification Engineer at Apple plays a crucial role in ensuring the delivery of bug-free first silicon for IP designs. This position involves all phases of pre-silicon verification, including the establishment of design verification methodologies and the development of test plans. The engineer will work on creating verification environments, writing tests, debugging, and ensuring coverage and sign-off for RTL freeze and tape-out, ultimately contributing to the development of innovative products that enhance the lives of millions of customers.

Responsibilities

• Develop detailed test and coverage plans based on the micro-architecture.
• Establish verification methodology suitable for the IP, ensuring a scalable and portable environment.
• Develop verification environment components such as stimulus, checkers, assertions, trackers, and coverage.
• Create verification plans for all features under your care.
• Execute verification plans, including design bring-up and regression enabling for all features.
• Debug test failures and track Design Verification progress using various metrics.
• Develop block, IP, and SoC level test-benches.
• Collaborate with the analog team to ensure overall bug-free IP design.

Requirements

• BS degree in a technical subject area.
• Minimum 3 years of meaningful experience in design verification.
• Solid understanding of SystemVerilog test-bench language and UVM.
• Experience developing scalable and portable test-benches.
• Familiarity with verification methodologies and tools such as simulators and waveform viewers.
• Experience with serial protocols such as PCIe or USB.
• Knowledge of IP verification methodology for IPs such as PHYs and PLLs.
• Expert level knowledge in C/C++ in lieu of UVM knowledge.
• Working knowledge of scripting languages like Python, Perl, or TCL.
• Proven experience in formal verification methodology.

Nice-to-haves

• Experience with verification methodologies and tools such as simulators, waveform viewers, and coverage collection.
• Experience with gate level simulations.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain educational expenses, including tuition.
• Opportunity to participate in Apple's discretionary employee stock programs.
• Eligibility for discretionary bonuses or commission payments.
• Relocation assistance may be available.