Design Verification Engineer

$166,600 - $296,300/Yr

Apple - San Diego, CA

posted 2 months ago

Full-time - Senior
San Diego, CA
Computer and Electronic Product Manufacturing

About the position

As a Design Verification Engineer at Apple, you will play a pivotal role in the verification of the functionality and performance of Apple's premier System on Chips (SOCs). This position is critical within Apple's Hardware Technology team, where you will be at the heart of the chip design effort, collaborating with various fields to ensure the quality of SOCs, IPs, or subsystems. Your responsibilities will include reviewing design and architecture specifications, working closely with design and micro-architecture teams, and understanding the functional and performance goals of the designs to effectively conduct tests. In this role, you will develop comprehensive test plans, tests, and coverage plans, while also defining the next generation verification methodology and testbenches. Active communication and collaboration with design, architecture, and software teams will be essential to understand use cases and corner conditions, which will drive your test case development. The SOCs you will work on may include various subsystems and IPs such as Neural Engine hardware, DRAM subsystems, memory controller logic, encoding and decoding systems for various codec formats, hardware security implementations, high-speed IO standards, power management, memory cache management, and display subsystems for a variety of products. This position allows you the flexibility to focus deeply on one main IP or broaden your expertise across multiple subsystems, depending on your interests and career goals.

Responsibilities

  • Verify the functionality and performance of Apple's SOCs.
  • Review design and architecture specifications.
  • Collaborate with design and micro-architecture teams.
  • Develop test plans, tests, and coverage plans.
  • Define next generation verification methodology and testbenches.
  • Communicate and collaborate with design, architecture, and software teams to understand use cases and corner conditions.
  • Drive the development of test cases for various subsystems and IPs.

Requirements

  • Minimum of a BS degree in a relevant field.
  • 10 years of relevant industry experience.
  • Skilled in digital verification processes including constrained random verification, functional coverage, and assertion methodology.
  • Knowledge of SystemVerilog, digital simulation, and debugging techniques.
  • Understanding of computer architecture and digital design fundamentals.
  • Good software programming skills, particularly in data structures and algorithms.
  • Experience with Python, Perl, or similar scripting languages.
  • Ability to work independently to achieve project goals.
  • Familiarity with verification methodologies like UVM.
  • Experience with C/C++ and assembly language is a plus.
  • Excellent interpersonal and communication skills.

Nice-to-haves

  • Experience with high-speed IO standards such as PCI Express, DisplayPort, and MIPI.
  • Knowledge of power management and fabric infrastructure.
  • Experience with memory cache management.

Benefits

  • Comprehensive medical and dental coverage.
  • Retirement benefits.
  • Discounted products and free services.
  • Reimbursement for certain educational expenses, including tuition.
  • Opportunity to participate in Apple's discretionary employee stock programs.
  • Eligibility for discretionary bonuses or commission payments.
  • Relocation assistance may be available.
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