Digital Design Engineer

Idaho Scientific - Salt Lake City, UT

Full-time - Mid Level

Salt Lake City, UT

Professional, Scientific, and Technical Services

About the position

The Digital Design Engineer at Idaho Scientific plays a crucial role in designing and deploying secure system solutions, focusing on novel CPU design, crypto cores, and system-on-a-chip architectures. This position involves collaboration with team leaders to identify and solve complex problems, optimizing microarchitecture for performance and security, and contributing to the entire design process from specification to production.

Responsibilities

• Collaborate with team leaders to explore and clearly identify real problems and solutions.
• Refine and improve the microarchitecture of Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
• Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
• Integrate complex systems that instantiate both Idaho Scientific and third party IP.
• Contribute to all aspects of design success from specification to production.
• Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
• Use high-quality design methods and processes to achieve excellent results.
• Work with other top-notch ASIC design engineers.

Requirements

• US Citizenship (no exceptions)
• Proven work experience designing and fabricating an ASIC (no exceptions)
• Ability to get a security clearance
• Solid technical understanding of FPGA or ASIC product development
• Ability to communicate clearly in person and in written documentation
• Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
• In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
• Strong analytical and problem solving skills
• Extreme attention to detail
• A willingness to roll up one s sleeves to get the job done
• Skilled at working effectively with cross functional teams.

Nice-to-haves

• US Security Clearance, Active or current within the last two years
• Prior experience with FPGA emulation of complex RTL
• Working knowledge of applied cryptography and cyber security topics
• Experience applying principles of cyber security to operational technology and embedded systems
• Experience with SystemVerilog, VHDL, and Test-Driven Development principles.

Benefits

• Competitive Pay
• Flexible Work Schedule
• Health Benefits and Insurance
• Retirement fund contributions
• Profit Sharing
• Generous Paid Time Off Policy