Cadence Design Systems - San Jose, CA

posted 3 months ago

Full-time - Senior
San Jose, CA
Professional, Scientific, and Technical Services

About the position

At Cadence, we are looking for a highly skilled Digital IC Implementation, Principal Application Engineer to join our North America Field Applications Team. This role is pivotal in driving customer engagements and working closely with our R&D teams to enhance our customers' experience with Cadence's cutting-edge technologies. As a Principal Application Engineer, you will leverage your extensive knowledge in nanometer design and digital design implementation to help our clients achieve their design goals. You will be responsible for understanding customer design requirements and methodologies, guiding them in the adoption of Cadence tools, and ensuring they meet their project schedules and performance targets. In this position, you will conduct technical presentations and lead technical evaluations and benchmarks, ensuring that our customers can effectively utilize Cadence technologies to meet or exceed their PPA (Power, Performance, Area) targets. You will also have the opportunity to amend and augment design flows using your programming skills in Tcl or other scripting languages to improve results and streamline processes. This role not only allows you to deepen your technical expertise but also enhances your communication, customer interaction, and sales skills, positioning you for future career advancement, whether in technical leadership, management, or sales/marketing roles. As a Digital Implementation and Signoff Field Applications Engineer, you will work side-by-side with leading-edge customers, helping them deploy our market-leading technologies in Synthesis, Place and Route, and Signoff. Your contributions will be crucial in turning their design concepts into reality and achieving faster design closure. This is an exciting opportunity to make a significant impact in the world of technology and to be part of a team that values innovation and leadership.

Responsibilities

  • Understand customer design requirements and methodology and drive adoption and proliferation of Cadence tools and technologies.
  • Guide customers on how to best utilize Cadence technologies to achieve their design goals at advanced nodes and meet project schedules.
  • Conduct technical presentations and drive technical evaluations/benchmarks to success.
  • Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows.

Requirements

  • BS degree in Computer Science/Engineering, Electrical Engineering, or related field.
  • 8+ years of design/EDA experience.
  • Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis.
  • Prior experience with IC digital implementation flows and backend EDA tools including Synthesis, Place and Route, IR Drop, backend design timing and power closure.
  • Experience in scripting languages such as Tcl/Perl/Python is a must.
  • Strong customer-facing communication and problem-solving skills.
  • Strong personal drive for continuous learning and expanding professional skill sets.
  • Strong verbal, written, and customer communication skills.

Nice-to-haves

  • MS degree in Computer Science/Engineering, Electrical Engineering, or related field.
  • Prior experience with IC digital implementation flows and back-end EDA tools including place and route.
  • Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus is highly desired.
  • Experience with advanced nodes 7nm and below.

Benefits

  • Paid vacation and paid holidays
  • 401(k) plan with employer match
  • Employee stock purchase plan
  • A variety of medical, dental and vision plan options
  • Incentive compensation: bonus, equity, and benefits
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