Capgemini
posted about 2 months ago
Capgemini is seeking a high-speed memory validation engineer to validate memory designs. This role requires a comprehensive understanding of the end-to-end product development life cycle, including requirement analysis, architecture design and analysis, implementation, testing, validation, compliance certification, and product delivery. The engineer will work with high-end oscilloscopes, logic analyzers, and signal generators to ensure the integrity and performance of memory systems. The ideal candidate will have design experience with various processors and interfaces, including Power PC, ARM, NXP, Intel processors, microcontrollers, FPGA, CPLD, FLASH, eMMC, and DDR memory types. Responsibilities will include pre and post-layout signal integrity (SI), power integrity, power distribution network (PDN), electromagnetic interference (EMI) and electromagnetic compatibility (EMC), timing, thermal, and power analysis. The engineer will also be responsible for board bring-up, functional testing, power testing, high-speed interface testing, thermal testing, and system integration testing. In addition to technical skills, the role requires experience in schematic design using tools such as ORCAD Capture, Allegro Design Entry HDL, and Mentor Graphics - Dx Designer. Layout review will involve using ORCAD Viewer, Allegro, Mentor Physical Viewer, Valor, and GC Preview tools. The candidate should also have experience in team management and product management, as well as client team coordination and project delivery. This position is critical in ensuring that products meet the highest standards of quality and performance before they reach the market.