About the position
As Optiver's FPGA Engineer Intern, you'll own projects directly impacting Optiver's world-class trading systems. You will work on creating solutions that solve business challenges effectively and efficiently, focusing on nanosecond response times, highly parallelised algorithms, and customised low-level networking. Led by our in-house education team, you will play a key role in advancing our FPGA technology, working on projects that push the boundaries of performance and efficiency. You will experience tight feedback loops and see the impact of your code in just a few weeks. You will work closely with senior Engineers and Traders to build latency-critical applications, parallel systems, and networking interfaces. This internship will allow you to tackle complex, real-world problems to enhance your critical thinking and problem-solving skills. You will work on projects that blend cutting-edge FPGA technology with real-world trading strategies, directly contributing to the efficiency and performance of our trading systems. For example, you will support new networking protocols, such as 25G and 100G interfaces, and develop applications with our Traders to improve our trading strategies and success rates. You will have the opportunity to make your mark on our future trading systems by trailblazing new domain areas, from high-precision timestamping to new proprietary inter-system communication protocols.
Responsibilities
- Own projects that impact Optiver's trading systems.
- Create solutions for business challenges focusing on performance and efficiency.
- Work closely with senior Engineers and Traders to build latency-critical applications.
- Support new networking protocols like 25G and 100G interfaces.
- Develop applications to improve trading strategies and success rates.
- Contribute to the efficiency and performance of trading systems.
Requirements
- Working towards a bachelor's, master's, or PhD in Computer Engineering, Electrical Engineering, or a related field, graduating between December 2025 and June 2026.
- Strong engineering instincts and academic experience in digital design with FPGAs or ASICs.
- Experience in writing hardware in VHDL, Verilog, or SystemsVerilog.
- Passionate about clean code, simple, well-architected systems, and continuous improvement.
Benefits
- Highly-competitive internship compensation package.
- Optiver-covered flights, living accommodations, and commuting stipends (where applicable).
- Fully paid commuting expenses, daily breakfast and lunch, social events, and clubs.
