Hardware Design Engineer 1

Actalent - Morrisville, NC

Full-time - Entry Level

Morrisville, NC

10,001+ employees

Administrative and Support Services

About the position

The Mask Layout Design Engineer role focuses on executing IC layout for high-speed CMOS Interface D2D and SERDES integrated circuits, specifically for next-generation Consumer Cloud Computing Devices. The position requires a self-motivated engineer with strong technical and interpersonal skills, capable of working independently or as part of a dynamic design team.

Responsibilities

• Execute IC layout of high-performance, low-power CMOS Interface D2D and SERDES integrated circuits in foundry CMOS process nodes (2nm and 3nm).
• Utilize Cadence Virtuoso design tool and flow for layout design.
• Work on highly analog IPs including analog PLL, DLL, ADC, RX, TX, OTAs, LDO, Clock Distribution, Bandgap, and Bias.
• Conduct layout design review presentations.
• Oversee layout floor-planning and supervision.
• Perform physical LVS, DRC, and DFM.

Requirements

• 0-2 years of overall experience in the field.
• Minimum 1 year of experience in high-performance analog layout in advanced FINFET CMOS processes (2nm and 3nm preferred).
• Detailed knowledge of EDA tools for Cadence, Mentor, and Synopsys.
• Experience with layout of high-performance analog blocks such as VCOs, charge pumps, phase interpolators, clock distribution, bandgap, OTAs, PLLs, ADCs, LDOs, RX, TX references, etc.
• Knowledge of analog design and layout guidelines and high-speed IO.
• Experience with floor planning, block-level routing, and large macro-level assembly.
• Knowledge of high-performance analog layout techniques such as common centroid layout, matching, symmetrical layout, signal shielding, use of dummy devices, thermal-aware layout, and consideration for electro migration, IR, ESD, and other analog-specific guidelines.
• Confirmed experience with analog layout for silicon chips in mass production.
• Experience with sub-micron design in foundry CMOS nodes (2nm, 3nm, and 5nm FINFET).
• Ability to define and adhere to a schedule.

Nice-to-haves

• MSFT experience is a plus but not required.
• BS degree is a plus.