Hardware Design Engineer 4

$156,000 - $166,400/Yr

ManpowerGroup - Mountain View, CA

Full-time - Mid Level

Remote - Mountain View, CA

Administrative and Support Services

About the position

The Hardware Design Engineer 4 position is a remote role that offers the opportunity to work on cutting-edge technologies within a dynamic and innovative environment. This position is ideal for individuals with a strong background in analog design and layout, particularly in high-performance analog layouts using advanced FINFET CMOS processes. The successful candidate will be expected to leverage their expertise in analog IPs, including PLL, DLL, ADC, RX, TX, OTAs, LDO, Bandgap, and Bias, to contribute to the development of high-performance analog blocks. Candidates should possess a minimum of 5 years of experience with Cadence Virtuoso design tools and flow, as well as deep FinFET technology experience, specifically with processes at 3 nanometers or below. The role requires a detailed understanding of EDA tools, particularly Cadence, Mentor, and Synopsys, and the ability to perform floor planning, block-level routing, and large macro-level assembly. The position is designed for those who are passionate about working with advanced technologies and are eager to contribute to innovative projects in the hardware design field.

Responsibilities

• Design and develop high-performance analog layouts using advanced FINFET CMOS processes.
• Utilize Cadence Virtuoso design tools and flow for layout and design tasks.
• Implement floor planning and block-level routing for complex analog circuits.
• Collaborate with cross-functional teams to ensure design specifications are met.
• Conduct thorough testing and validation of analog designs to ensure performance standards are achieved.

Requirements

• 5+ years of experience in high-performance analog layout in advanced FINFET CMOS process, preferably 3nm technology.
• Minimum 5+ years of experience with highly analog IPs, including PLL, DLL, ADC, RX, TX, OTAs, LDO, Bandgap, and Bias.
• Proficiency in Cadence Virtuoso design tools and flow for analog design.
• Deep understanding of EDA tools, particularly Cadence, Mentor, and Synopsys.
• Experience in the layout of high-performance analog blocks such as VCOs, charge pumps, interpolators, bandgaps, OTAs, PLLs, ADCs, LDOs, RX, TX, and references.

Nice-to-haves

• Experience with additional EDA tools beyond Cadence, Mentor, and Synopsys.
• Familiarity with high-speed IO design guidelines.
• Knowledge of emerging technologies in analog design.