ManpowerGroup - Redmond, WA

posted 8 days ago

Full-time - Mid Level
Redmond, WA
Administrative and Support Services

About the position

The Hardware Design Verification Engineer will play a crucial role in supporting the development of the next generation of AI chips. This position involves extensive collaboration within a team-oriented environment, focusing on block level verification and utilizing Universal Verification Methodology (UVM) to ensure the accuracy and efficiency of hardware designs.

Responsibilities

  • Own verification for complex IPs, including creating test plans.
  • Develop Universal Verification Methodology (UVM) components and environments from scratch.
  • Write test cases and debug failures to root cause issues.
  • Run and maintain verification processes.

Requirements

  • Minimum 7+ years' experience with ASIC Design Verification.
  • Minimum 7+ years' experience with unit level verification.
  • Minimum 7+ years' experience in UVM library.

Benefits

  • Medical/Dental/Vision
  • 401K
  • PTO - Paid Time Off
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