Hardware Engineer 4

Object Technology Solutions - San Jose, CA

Full-time - Mid Level

San Jose, CA

51-100 employees

Professional, Scientific, and Technical Services

About the position

The Hardware Engineer 4 position at OTSI involves developing the next generation of Solid State Drive (SSD) products. This role requires a self-motivated and team-oriented individual with a strong background in hardware architecture, design, signal integrity, and power supply design. The successful candidate will engage in modeling and simulation for high-speed signaling implementations and power supply design, including power distribution network (PDN) simulations. A comprehensive understanding of state-of-the-art memory device technologies and interfaces such as SATA, SAS, PCIe Gen 3&4, and ONFI is essential, along with the implementation techniques required for high-speed interfaces. Additionally, expertise in Buck and boost power supply designs is necessary. The role also demands proficiency with PCB design tools, particularly Cadence PCB design and analysis, including Si/Pi. The candidate should possess a strong focus on optimizing signal and power integrity, complemented by hands-on lab experience. Responsibilities include interfacing with cross-functional teams to ensure design compliance with firmware, diagnostic, and system-level requirements, participating in architecture definition, conducting design reviews, and generating requirements for SSD products. The engineer will perform basic signal and power integrity measurements, document and communicate results, and simulate and analyze design proposals, providing recommendations on optimal design practices. The position requires experience in designing hardware for large-scale manufacturing, including considerations for DFx and cost efficiency. The engineer will take complete ownership of the SSD hardware throughout the product lifecycle, managing the PCB back-end process, defining stack-up and via technologies, part placement, and setting design constraints. Proactive collaboration with cross-functional team members during design, verification, and RMAs is crucial. Critical skills include a strong desire to tackle challenges, attention to detail, and effective communication abilities. The candidate should have a solid understanding of transmission line fundamentals and circuit designs, as well as practical experience with design tools and lab SI analysis equipment.

Responsibilities

• Interface in cross functional teams to ensure the design meets all firmware, diagnostic and system level requirements.
• Participate in architecture definition, design reviews, requirements generation of SSD products.
• Perform basic Signal and power integrity measurements.
• Document and communicate results with cross functional counterparts.
• Simulate and analyze design proposals, review results and provide recommendations on optimal design practices to other design engineers.
• Design hardware for large scale manufacture, including DFx and low cost considerations.
• Conduct hardware design, worst-case analysis, simulations, capture schematic, de-rating and assume complete ownership of the SSD hardware through the product lifecycle.
• Manage PCB back-end process: defining stack-up and via technologies, part placement, setting design constraints, signal integrity and power integrity analysis.
• Work proactively with cross functional team members during design, verification as well as on RMAs.

Requirements

• BS in Electrical Engineering required; MS in Electrical Engineering is preferred.
• Good written and verbal communication skills.
• Good problem-solving skills.
• Experience in hardware architecture, design, signal integrity, and power supply design.
• Knowledge of state-of-the-art memory device technologies and interfaces such as SATA, SAS, PCIe Gen 3&4, ONFI.
• Experience with Buck and boost power supply designs.
• Proficiency with PCB design tools (Cadence PCB design and analysis, including Si/Pi).
• Hands-on lab experience with signal integrity analysis.

Nice-to-haves

• Experience with Cadence Sigrity, Allegro Power-Aware SI.
• Familiarity with Mentor Graphics HyperLynx.
• Practical lab SI analysis experience using high-bandwidth measurement equipment.