Google - Mountain View, CA
posted 6 months ago
As an Integration Methodology and Flow Physical Design Engineer at Google, you will be at the forefront of designing and building the hardware that powers Google's vast array of services. Your role will involve tackling complex computational challenges that require custom hardware solutions rather than off-the-shelf products. You will work on the integration of System-on-a-Chip (SoC) designs, focusing on low power design methodologies and ensuring that the integration flows are efficient and effective. This position requires a deep understanding of physical design flows and the ability to develop and execute SoC integration strategies that meet stringent performance, power, and area requirements. In this role, you will lead projects that span multiple engineering domains within a data center facility. This includes overseeing the construction and installation of equipment, troubleshooting issues, and collaborating with vendors to ensure that all systems are functioning optimally. Your technical expertise will be crucial in developing new technologies and hardware that enhance computing capabilities, making them faster and more powerful. You will also be responsible for ensuring that the SoC integration is block-friendly and aligns with the overall design goals, including reliability and performance metrics. Your work will have a significant impact on the machinery that supports Google's cutting-edge data centers, ultimately affecting millions of users worldwide. You will be part of a team that combines the best of AI, software, and hardware to create innovative solutions that improve people's lives through technology. This position offers a unique opportunity to contribute to the development of systems that are integral to Google's mission of organizing the world's information and making it universally accessible and useful.