Jr. Digital Hardware Engineer

Integration Innovation - Washington, DC

Full-time - Entry Level

Washington, DC

Specialty Trade Contractors

About the position

i3 has an exciting opportunity for a Digital Hardware Engineer to support the Naval Research Laboratory, Tactical Electronic Warfare Division. The Tactical Electronic Warfare Division's mission is to protect the warfighter from emerging threats by advancing electronic warfare (EW) through analysis and research, development, test, and evaluation (RDT&E) of current and future technologies. As a Junior Digital Hardware Engineer, you will be involved in designing, implementing, analyzing, and testing FPGA-based digital systems. This role requires a strong foundation in hardware design and the ability to work collaboratively within a team to develop innovative solutions that meet the needs of our military clients. In this position, you will develop hardware description language (HDL) and block designs for FPGAs, integrating manufacturer IP FPGA cores such as processors, ADCs, and DACs into customized firmware architectures. You will also be responsible for designing and validating testbench routines for the simulation of FPGA designs and sub-designs. Additionally, you will generate technical reports documenting your design processes and analysis results, ensuring that all documentation meets the high standards expected in defense-related projects. Your contributions will play a crucial role in advancing the capabilities of electronic warfare systems and enhancing the safety and effectiveness of our warfighters.

Responsibilities

• Design, implement, analyze and test FPGA-based digital systems.
• Develop HDL and block designs for FPGAs.
• Integrate manufacturer IP FPGA cores (processor, ADC, DAC, etc.) into customized firmware architectures.
• Design and validate testbench routines for simulation of FPGA designs and sub-designs.
• Generate technical reports documenting design and analysis.

Requirements

• Bachelor's degree in electrical engineering, physics, or related field.
• Minimum two (2) years of experience.
• Thorough understanding of HDL (VHDL or Verilog).
• Ability to generate architectural block diagrams from existing firmware designs.
• Experience developing and testing FPGAs or ASICs.
• Knowledge of Altera and Xilinx development environments (e.g. Vivado, Quartus, Synplify).
• Knowledge of FPGA/ASIC simulation and validation environment (e.g. ModelSim, Verdi).

Nice-to-haves

• Knowledge of microprocessor architecture and high speed interfaces as applied to FPGA Core functions.
• Experience with analysis of existing digital logic designs.

Benefits

• 100% team member owned
• Outstanding insurance coverage
• 401(k) match
• Health and wellness incentives
• Tuition and certification reimbursement
• Generous PTO
• Fun culture with company activities
• Countless opportunities to give back to the community through our charitable organization, i3 Cares