Samsung - San Jose, CA

posted 15 days ago

Full-time - Senior
San Jose, CA
Merchant Wholesalers, Durable Goods

About the position

The Physical Design Architect role focuses on defining and driving the physical architecture of semiconductor designs, collaborating with various teams throughout the design cycle. This position requires extensive experience in physical design, timing closure, and hands-on work with industry-standard tools for high-speed digital designs in advanced process nodes.

Responsibilities

  • Work closely with the logic design team to define physical architecture and drive physical aspects during the design cycle.
  • Collaborate across teams including physical design, logic design, package, DFT, and test.
  • Perform hands-on synthesis and place and route (PnR) using industry-standard tools for high-speed digital designs in advanced process nodes.
  • Conduct all aspects of sign-off including power, timing, physical verification checks, and design closure.

Requirements

  • 15-20 years of experience in Physical Design and timing closure in the semiconductor domain.
  • Hands-on experience in synthesis, PnR, and static timing analysis (STA) using Cadence/Synopsys tools for complex digital designs in 7nm and below.
  • Experience with multiple large SoC tapeouts in advanced nodes, including hands-on experience in chip-level physical design and STA closure.
  • Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, with expertise in timing closure at block/chip levels and ECO flows.
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