TechSpace Solutions - San Jose, CA

posted 12 days ago

Full-time
San Jose, CA
Professional, Scientific, and Technical Services

About the position

The Physical Design Architect role involves defining the physical architecture and driving physical aspects during the design cycle for high-speed digital designs. This position requires collaboration across various teams and hands-on experience with industry-standard tools for synthesis and place-and-route (PnR) in advanced process nodes.

Responsibilities

  • Work closely with the logic design team to define physical architecture and drive physical aspects during the design cycle.
  • Collaborate across teams including physical design, logic design, package, DFT, and test.
  • Perform hands-on synthesis and PnR using industry-standard tools for high-speed digital designs in advanced process nodes.
  • Conduct all aspects of sign-off including power, timing, physical verification checks, and design closure.

Requirements

  • 15-20 years of experience in Physical Design and timing closure.
  • Hands-on experience in synthesis, PnR, and STA using Cadence/Synopsys tools for complex digital designs in 7nm and below.
  • Experience with multiple large SoC tapeouts in advanced nodes, including hands-on experience in chip-level physical design and STA closure.
  • Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, with expertise in timing closure at block/chip levels and ECO flows.
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service