Synopsys - Boxborough, MA

posted 2 months ago

Full-time - Mid Level
Boxborough, MA
Publishing Industries

About the position

At Synopsys, we are at the forefront of innovations that are transforming the way we work and play, including advancements in self-driving cars, artificial intelligence, cloud computing, 5G, and the Internet of Things. Our Silicon IP business focuses on integrating more capabilities into System on Chips (SoCs) at an accelerated pace. We offer the world's most extensive portfolio of silicon IP, which includes pre-designed blocks of logic, memory, interfaces, analog components, security features, and embedded processors. This enables our customers to meet unique performance, power, and size requirements for their target applications, allowing them to bring differentiated products to market quickly while minimizing risk. The Analog & MS Physical Design team is composed of R&D professionals with a comprehensive understanding of mixed-signal design, implementation, firmware, and verification. Our team has experience in both back-end and front-end ASIC development flows, with a specific focus on providing targeted support for UCIe, mixed-signal High-Bandwidth Memory (HBM), and DDR PHY IP customers. We are seeking a candidate to join our team to assist with back-end and custom circuit tasks. The ideal candidate will have specialization in one or more areas, with experience in multiple areas being a bonus. The tasks will be tailored to the candidate's skills and development, and may include: - Custom Circuit Design using Synopsys tools such as Custom Compiler and ICVWB. - Performing LVS, DRC, and ERC checks using Synopsys ICV and Calibre tools. - Utilizing Spice and PERC for circuit simulations. - Working with hardware description languages such as VHDL, Verilog, and System Verilog. The diversity of tasks allows each team member to develop new skills and gain insights into all aspects of our PHY design. The primary focus of the team is to support application engineers in solving customer problems, which often requires in-depth investigations into the design. When not addressing customer inquiries, we leverage our expertise to drive product improvements. While experience with HBM or DDR protocols is advantageous, it is not a strict requirement.

Responsibilities

  • Interact with and, in some instances, visit customers
  • Provide guidance to customers on PHY implementation tasks
  • Participate in the generation of data books, application notes, and white papers
  • Perform constraint development and physical design activities
  • Other related duties as assigned by the manager

Requirements

  • BSEE degree or Applied Science degree (or equivalent) with 2+ years of related experience
  • Excellent communication and presentation skills

Nice-to-haves

  • Experience with HBM or DDR protocols
  • Familiarity with Synopsys tools such as Custom Compiler and ICVWB
  • Knowledge of Spice, PERC, VHDL, Verilog, and System Verilog

Benefits

  • Comprehensive health benefits
  • Wellness programs
  • Financial benefits including equity and discretionary bonuses
  • Competitive total rewards package
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