Synopsys - Sunnyvale, CA
posted 2 months ago
Synopsys is seeking a talented Principal CPU Design Engineer who will play a crucial role in the development of our next-generation ARC-V processor IP, which is based on the open-source RISC-V instruction set architecture. This position is integral to our Silicon IP business, which focuses on integrating advanced capabilities into System on Chips (SoCs) at an accelerated pace. The ideal candidate will have extensive experience in microarchitecture and RTL development, with a proven track record of delivering high-quality products on time. The role requires collaboration with architects to develop micro-architecture and hardware specifications for design blocks, as well as hands-on development of RTL code with performance, power, and area (PPA) considerations in mind. In this position, you will be responsible for carrying out essential design processes including Linting, CDC, RDC, Synthesis, and Timing Analysis of design blocks. You will work closely with the verification team to review test plans and establish sign-off criteria for design and verification activities. Interaction and collaboration with various stakeholders across the project, including verification, software, DFT, physical design, and prototyping, will be key to your success. Additionally, mentoring junior engineers will be an important aspect of this role, fostering a collaborative and innovative team environment. At Synopsys, we are at the forefront of technological advancements that are shaping the future, including self-driving cars, artificial intelligence, and the Internet of Things. If you are passionate about innovation and have the expertise in CPU design, we want to meet you!