Principal SoC Design Engineer

$137,600 - $267,000/Yr

Microsoft - Austin, TX

posted 16 days ago

- Senior
Remote - Austin, TX
Publishing Industries

About the position

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Principal SOC Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Responsibilities

  • Contribute to the SoC design team focused on high-performance, high-bandwidth designs.
  • Work on Intellectual Property (IP) microarchitecture specifications for SOC development.
  • Design Register Transfer Level (RTL) for efficient hardware implementation.
  • Integrate SOC components, including clocking and reset management.
  • Perform synthesis and static checks, including Lint and Clock/Reset domain crossings.
  • Collaborate with architecture, verification, and physical design teams to ensure design accuracy.
  • Ensure that the design meets specifications through thorough implementation and verification processes.

Requirements

  • 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
  • 8+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs.
  • 5+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/LINT closure.
  • 5+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs.
  • 3+ years of experience with post-silicon debug.

Nice-to-haves

  • 12+ years technical engineering experience
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience.
  • 6+ years of experience working on SOC integration.
  • 6+ years of experience with LINT/Clock Domain Crossing (CDC)/Reset Domain Crossing (RDC) closure.
  • 5+ years of experience with Synthesis, Timing constraints and UPF.
  • Experience with industry standard interfaces such as AXI, APB, JTAG.
  • Experience with writing System Verilog assertions.
  • Experience with scripting languages such as Perl or Python.
  • Track record of successful tapeouts in deep sub-micron technologies.
  • Experience with multiple post silicon bringup and validation cycles.
  • Excellent communication skills and the ability to facilitate collaboration across Microsoft internal groups and external vendors.
  • Ability and willingness to adapt and work on variety of designs.

Benefits

  • The typical base pay range for this role across the U.S. is USD $137,600 - $267,000 per year.
  • In specific locations like the San Francisco Bay area and New York City metropolitan area, the base pay range is USD $180,400 - $294,000 per year.
Job Description Matching

Match and compare your resume to any job description

Start Matching
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service