Synopsys - Sunnyvale, CA

posted about 1 month ago

Full-time - Senior
Sunnyvale, CA
Publishing Industries

About the position

At Synopsys, we are at the forefront of innovations that are transforming the way we work and play, including advancements in self-driving cars, artificial intelligence, cloud computing, 5G, and the Internet of Things. Our Silicon IP business focuses on integrating more capabilities into System on Chips (SoCs) at an accelerated pace. We provide the world's most extensive portfolio of silicon IP, which includes pre-designed blocks of logic, memory, interfaces, analog components, security features, and embedded processors. This enables our customers to meet the unique performance, power, and size requirements of their target applications, allowing them to bring differentiated products to market quickly while minimizing risk. The Senior Applications Engineer position is a critical role that requires a highly motivated and experienced individual to collaborate with Synopsys' customers on the integration of cutting-edge Interface IP (IIP) into their ASIC SoCs and systems for next-generation products. This role offers the opportunity to work with Synopsys' PCIe (Peripheral Component Interconnect Express) IP and engage with the latest industry specifications and applications across various high-demand market segments. The engineer will provide PCIe IP integration guidance to customers throughout their SoC development process, addressing technical challenges, conducting integration reviews at key milestones, and supporting silicon/system bring-up. Some travel will be required for this position.

Responsibilities

  • Understand IIP applications on customer-specific SoCs and systems.
  • Stay updated on the latest ASIC/SoC design flows and EDA tools.
  • Provide professional advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, and silicon bring-up.
  • Conduct integration training for customers and review their major SoC milestones.
  • Collaborate with R&D to produce application notes on advanced topics.
  • Provide pre-sales support on IIP integration and assist with conference demonstrations.
  • Offer feedback to Synopsys R&D for continuous IIP product improvements.
  • Participate in R&D design reviews to align development with future customer needs.

Requirements

  • Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
  • Typically requires at least 8 years of design, verification, or applications experience.
  • Hands-on experience in ASIC Front-End or Back-End development.
  • Attention to detail and a high degree of self-motivation.
  • Proven methodical reasoning and problem-solving skills.
  • Strong verbal and written communication skills.

Nice-to-haves

  • Experience with advanced technology processes (10nm/7nm/5nm/3nm) in mixed signal IP or circuit design, implementation, or technical support.
  • Domain knowledge in Die-to-Die and PCIe/CXL protocol is highly desirable.
  • Silicon and/or FPGA/hardware debug and troubleshooting skills.
  • Knowledge of advanced EDA tool products and expertise in areas such as P&R, Physical Verification, Signal Integrity/Power Integrity.

Benefits

  • Comprehensive health benefits
  • Wellness programs
  • Financial benefits including equity and discretionary bonuses
  • Competitive total rewards package
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