Synopsys - Mountain View, CA

posted about 2 months ago

Full-time - Mid Level
Mountain View, CA
Publishing Industries

About the position

At Synopsys, we are at the forefront of innovations that are transforming the way we work and play. Our Silicon IP business focuses on integrating advanced capabilities into System on Chips (SoCs) at an accelerated pace. We provide the world's most extensive portfolio of silicon IP, which includes pre-designed blocks of logic, memory, interfaces, analog, security, and embedded processors. This enables our customers to meet unique performance, power, and size requirements for their target applications, allowing them to bring differentiated products to market quickly while minimizing risk. The Senior Applications Engineer position is a critical role that requires a highly motivated and experienced individual to collaborate with Synopsys' customers in integrating cutting-edge Interface IP (IIP) into their ASIC SoCs and systems for next-generation products. This role offers the opportunity to work with Synopsys' PCIe (Peripheral Component Interconnect Express) IP and the latest industry specifications across various high-demand market segments. The engineer will provide PCIe IP integration guidance to customers throughout their SoC development process, addressing technical challenges, conducting integration reviews at key milestones, and supporting silicon/system bring-up. Some travel will be required to fulfill these responsibilities. In this position, you will be expected to stay updated on the latest ASIC/SoC design flows and EDA tools, provide professional advice and support to resolve IIP integration challenges, and conduct training sessions for customers. You will also partner with R&D to produce application notes on advanced topics and provide pre-sales support for IIP integration, including conference demonstrations. Additionally, you will be responsible for providing feedback to Synopsys R&D for continuous product improvements and participating in design reviews to align development with future customer needs.

Responsibilities

  • Understand IIP applications on customer-specific SoC and systems
  • Keep abreast of the latest ASIC/SoC design flows and EDA tools
  • Provide professional advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, silicon bring-up, etc.
  • Provide integration training to customers and conduct reviews on their major SoC milestones
  • Partner with R&D to produce application notes on advanced topics
  • Provide pre-sales support on IIP integration and support conference demos
  • Provide feedback to Synopsys R&D for continuous IIP product improvements
  • Participate in R&D design reviews to align development with future customer needs

Requirements

  • Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields
  • Typically requires at least 8 years of design, verification, or applications experience
  • Hands-on experience on ASIC Front-End or Back-End development
  • Attention to detail and high degree of self-motivation
  • Proven methodical, reasoning, and problem-solving skills
  • Proven verbal and written communication skills

Nice-to-haves

  • Experience with advanced technology processes (10nm/7nm/5nm/3nm) mixed signal IP or circuit design, implementation or technical support
  • Domain knowledge in Die-to-Die and PCIe/CXL protocol are highly desirable
  • Silicon and/or FPGA/hardware debug and troubleshooting skills
  • Knowledge of advanced EDA tool products and product knowledge in any of the areas of P&R, Physical Verification, Signal Integrity/Power Integrity

Benefits

  • Comprehensive health benefits
  • Wellness benefits
  • Financial benefits
  • Annual bonus eligibility
  • Equity and other discretionary bonuses
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