Senior Digital Design Verification Engineer - Hardware

Rf Design - Santa Clara, CA

Full-time - Mid Level

Santa Clara, CA

Professional, Scientific, and Technical Services

About the position

As a Senior Digital Design Verification Engineer at NVIDIA, you will play a crucial role in verifying the design and implementation of our cutting-edge SerDes IPs. This groundbreaking technology is pivotal in enabling and accelerating advancements in gaming, artificial intelligence, deep learning, and autonomous driving. At NVIDIA, we pride ourselves on having assembled a best-in-class team dedicated to delivering IPs that are utilized by both standard and industry-leading proprietary high-speed protocols. Your work will directly contribute to the evolution of modern computing and the enhancement of human imagination and intelligence. In this position, you will be responsible for the verification of digital designs, golden models, and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM (Universal Verification Methodology). You will build reusable bus functional models, monitors, checkers, and scoreboards, adhering to a coverage-driven verification methodology. A key aspect of your role will involve understanding the design and implementation, defining the verification scope, developing the verification infrastructure, and ensuring the correctness of the design. You will write and execute test plans, thoroughly verifying designs within a product shipment-focused and compressed schedule. Collaboration with architects, designers, and pre- and post-silicon verification teams will be essential to accomplish your tasks effectively.

Responsibilities

• Verify the digital design, golden models, and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM.
• Build reusable bus functional models, monitors, checkers, and scoreboards following coverage-driven verification methodology.
• Understand the design and implementation, define the verification scope, and develop the verification infrastructure.
• Verify the correctness of the design and write and execute test plans.
• Thoroughly verify designs within a product shipment-focused and compressed schedule.
• Collaborate with architects, designers, and pre- and post-silicon verification teams.

Requirements

• Bachelor's or Master's Degree (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering.
• At least 5 years of proven experience in digital design verification.
• Background in verification at Unit/Sub-system/SOC level and expertise in SystemVerilog is a must.
• Experience using random stimulus along with functional coverage and assertion-based verification methodologies is essential.
• Familiarity with verification methodologies like UVM/VMM and exposure to industry-standard verification tools for simulation and debugging.

Nice-to-haves

• Expertise in bus or interconnect protocols (e.g., PCI Express, USB, SATA) is a big plus.
• Experience in verifying complex SerDes systems and understanding mixed-signal designs.
• Experience in modeling of analog circuits is a big plus.
• Proficiency in programming languages such as Perl, Python, and C/C++.
• Good debugging and analytical skills.
• Strong communication skills and a desire to work collaboratively as a great teammate.

Benefits

• Competitive salary and performance-based bonuses.
• Comprehensive health insurance plans.
• 401(k) retirement savings plan with company matching.
• Flexible work hours and remote work options.
• Opportunities for professional development and continued education.