Senior Process Integration Engineer

$134,400 - $249,600/Yr

Unclassified - Sunnyvale, CA

Full-time - Mid Level

Sunnyvale, CA

About the position

In the position of Senior Process Integration Engineer at Infinera, you will play a crucial role in ensuring the high quality and reliability of InP-based Photonic Integrated Circuit (PIC) products. This will involve conducting extensive experiments and data analysis to support the development and improvement of wafer fabrication processes. You will collaborate with various functional teams to troubleshoot issues and enhance the overall performance of the manufacturing processes. Your responsibilities will include developing qualification plans for wafer-level process improvements, maintaining design files for process test structures, and driving initiatives aimed at improving yield reliability. As a Senior Process Integration Engineer, you will manage the quality of PIC wafers by leveraging your knowledge of fabrication processes and device physics. You will be tasked with troubleshooting and resolving process deviations and test failures through detailed analysis of test data and process history. Additionally, you will investigate the impact of design rules on process yields and develop test structures that facilitate effective process control. Your role will also involve initiating and executing yield improvement activities from inception through qualification and implementation. Furthermore, you will support the development of next-generation PIC platforms and participate in technology development, transfer, and ramp activities to meet yield, reliability, cost, and device performance goals. Your expertise will be essential in supporting Process Engineering efforts to enhance process stability and capability, ensuring that Infinera continues to deliver innovative networking solutions to its customers.

Responsibilities

• Manage the quality of PIC wafers based on knowledge of fab processes, device physics, and the analysis of test and reliability surveillance data.
• Troubleshoot and resolve process deviations and test failures through a detailed analysis of test data and process history.
• Investigate the impact of design rules on process yields, develop test structures for effective process control.
• Initiate and carry out yield improvement activities, from inception through qualification and implementation.
• Support next-generation PIC platform development and participate in technology development, transfer, and ramp activities to meet yield, reliability, cost, and device performance goals.
• Support Process Engineering to improve process stability and capability.

Requirements

• Understanding of semiconductor processes and device physics.
• Understanding of statistical process control methods.
• Familiarity with or direct experience in most of the standard III-V process technologies required for wafer fabrication such as epitaxy, wet etching, plasma etching, metal deposition, and photolithography.
• Ability to work in a CAD design environment, generate and maintain mask files as well as die level test structure files.
• Database interrogation, statistical analysis skills, and design of experiments.
• Excellent communications skills and ability to present data, ideas, and recommendations to a diverse audience.
• B.S. with at least 3 years of work experience; M.S. level or higher in Electrical Engineering, Photonics, Physics, or Materials Science is preferred.

Benefits

• Paid leave
• Medical coverage
• Dental coverage
• Vision coverage
• 401(k)
• Life insurance
• Disability insurance