MediaTek - Austin, TX
posted 4 days ago
The Senior RTL Design Engineer will be responsible for Micro-architecture, RTL coding/integration, Synthesis of complex IP and ARM CPU subsystems. The role involves running RTL quality checks (Lint, Equivalence checks, CDC) to ensure the quality of RTL. The engineer will synthesize the design and provide timing constraints to the Physical Design team to ensure that the RTL meets timing. Additionally, the engineer will work with the DV team to define the test plan and verify the RTL thoroughly, as well as collaborate with worldwide teams to align on specifications and deliverables.
Match and compare your resume to any job description
Start Matching