Senior Signal and Power Integrity Engineer - Hardware

$128,000 - $258,750/Yr

Nvidia - Santa Clara, CA

Full-time - Senior

Santa Clara, CA

Computer and Electronic Product Manufacturing

About the position

As a Senior Signal & Power Integrity Engineer at NVIDIA, you will be part of a dynamic team that is at the forefront of technology innovation. Your primary focus will be on crafting creative Signal Integrity (SI) solutions to complex system design problems. This role involves conducting system-level signal integrity simulations for high-speed NVlinks exceeding 200Gbs, USB-4, PCIe5, GDDR6, and LP5X. You will be responsible for modeling various system components, including vias, connectors, and sockets, using advanced 3D electromagnetic (EM) tools. Additionally, you will design and optimize the Power Delivery Network (PDN) across packages and printed circuit boards (PCBs). Your work will also include constant improvements of SI/PI models through lab measurements, simulation automation, and data gathering. You will utilize tools such as JMP and MATLAB for analysis and visualization. This position offers the opportunity to work in a dynamic cross-functional role, collaborating with teams to optimize package, PCB, ASIC, and mixed-signal circuit designs. NVIDIA is a company that thrives on challenges and innovation, and as part of this team, you will contribute to projects that amplify human imagination and intelligence. If you are passionate about technology and eager to tackle complex problems, this is the perfect opportunity for you.

Responsibilities

• Craft creative Signal Integrity solutions to complex system design problems.
• Conduct system-level signal integrity simulations of high-speed NVlinks 200Gbs+, USB-4, PCIe5, GDDR6, LP5X.
• Model vias, connectors, sockets, and various system components in 3D EM tools.
• Design and optimize Power Delivery Network (PDN) across packages and PCBs.
• Improve SI/PI models through lab measurements.
• Automate simulations, gather data, and perform analysis and visualization using JMP, MATLAB, or similar tools.
• Collaborate in a cross-functional role to optimize package, PCB, ASIC, and mixed-signal circuit designs.

Requirements

• BS/MS in Electrical Engineering or equivalent experience.
• 3+ years of industry experience in Signal Integrity/Power Integrity work.
• Experience with signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X.
• Hands-on experience with 3-D modeling tools like ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE or similar.
• Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations.
• Background in system-level timing or loss budget including silicon, package, and board impairments.
• Familiarity with VNA, TDR, DSO, ParBERT, and applications like JMP, MATLAB.

Nice-to-haves

• Expertise in high-speed interface SI/PI design on industry-standard system platforms.
• Experience with lab measurements, debugging, and SI lab correlation using oscilloscope/spectrum analyzer/VNA.
• Knowledge of circuit design, board/pkg component design, link architecture, and timing budget methodologies.

Benefits

• Competitive base salary range of 128,000 USD - 258,750 USD based on location and experience.
• Eligibility for equity and comprehensive benefits package.