Senior Signal and Power Integrity Engineer - Hardware

$164,000 - $304,750/Yr

Nvidia - Santa Clara, CA

Full-time - Senior

Santa Clara, CA

Computer and Electronic Product Manufacturing

About the position

The Senior Signal & Power Integrity Engineer at NVIDIA will be responsible for developing innovative Signal Integrity solutions to address complex system design challenges. This role involves modeling and optimizing various system components, conducting system-level signal integrity simulations, and improving SI models based on lab measurements. The engineer will also create and review substrate and board layout SI guidelines, automate simulations, and work collaboratively across functions to enhance package, PCB, and ASIC designs.

Responsibilities

• Craft creative Signal Integrity solutions to complex system design problems.
• Model and optimize vias, connectors, sockets, breakouts, and various system components using 3D EM tools.
• Conduct system-level signal integrity simulations for high-speed interfaces such as NVlink, USB-4, PCIe5, GDDR6, and LP5X.
• Continuously improve SI models using data from lab measurements and updates to modeling tools/methodologies.
• Create, review, and extract SI guidelines for substrate and board layouts.
• Automate simulations and gather, analyze, and visualize data using tools like JMP and MATLAB.
• Collaborate in a cross-functional role to optimize package, PCB, ASIC, and mixed signal circuits.

Requirements

• BS/MS in Electrical Engineering or equivalent experience.
• 6+ years of industry experience in Signal Integrity.
• Strong technical background in applied electromagnetics, transmission line theory, and signal processing.
• Experience with signaling standards such as PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, and LPDDR5X.
• Hands-on experience with 3-D modeling tools like ANSYS HFSS/Q3D and 2.5-D tools like ANSYS SIWAVE.
• Familiarity with system-level timing or loss budgets including silicon, package, and board impairments.
• Experience with VNA, TDR, DSO, ParBERT, and tools like ADS, Ansys Designer, JMP, Matlab, and Cadence Allegro.

Nice-to-haves

• Expertise in high-speed interface SI/PI design on industry-standard platforms.
• Experience with lab measurements and debugging using oscilloscopes, spectrum analyzers, and VNAs.
• Knowledge of circuit design, board/package technology, and link architecture.
• Familiarity with PDN evaluation using layout extraction tools and spice-based time domain simulations.

Benefits

• Equity options
• Comprehensive health benefits
• Retirement savings plan
• Paid time off
• Flexible work hours
• Professional development opportunities