Senior Silicon Hardware Development Engineer

$164,000 - $304,750/Yr

Nvidia - Santa Clara, CA

Full-time - Senior

Santa Clara, CA

Computer and Electronic Product Manufacturing

About the position

Join NVIDIA, a trailblazer at the forefront of graphics and artificial intelligence performance, efficiency, and innovation. From our roots as a groundbreaking graphics company, we have evolved into a global leader in artificial intelligence, continuously pushing the boundaries to solve complex challenges across diverse industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition through bringup to product release. Our ArchDev arm is a hub for all silicon and system-level feature development, tradeoff analysis, system integration solutions, and system POR alignment. In this role, you will innovate and design by architecting and designing innovative system-level testing capabilities for complex silicon designs to improve quality, safety, and manufacturability. You will collaborate across System Architecture, DFT, ASIC, SW/FW, platform, validation, and production teams throughout the product life cycle. Additionally, you will lead system-level architecture, design, productization, debugging, and deployment. You will push the boundary by defining roadmaps, tracking industry/market trends, collecting current product feedback, prototyping new ideas, and conducting data-driven tradeoff analysis. Hands-on actions will include supporting silicon bring-up, validation, and debug; coordinating product level feature deployment; and leading efforts to address customer issues.

Responsibilities

• Architect and design innovative system-level testing capabilities for complex silicon designs to improve quality, safety, and manufacturability.
• Collaborate across System Architecture, DFT, ASIC, SW/FW, platform, validation, and production teams throughout the product life cycle.
• Lead system-level architecture, design, productization, debugging, and deployment.
• Define roadmaps by tracking industry/market trends, collecting current product feedback, prototyping new ideas, and conducting data-driven tradeoff analysis.
• Support silicon bring-up, validation, and debug.
• Coordinate product level feature deployment.
• Lead efforts to address customer issues.

Requirements

• BS or MS in Electrical/Computer Engineering or equivalent experience.
• 10-15 years in silicon system architecture, digital design, validation, and debugging.
• Strong fundamentals in digital design, system and microarchitecture, timing, power, and noise.
• Deep understanding of SW/firmware and HW/SW interaction.
• Knowledge in DFT, BIST, scan architecture, fault analysis, clocking, boot/reset flows, and ATE/SLT testing is nice to have.
• Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) is a plus.
• Basic programming and scripting skills such as C/C++, Python, Perl.
• Excellent problem-solving, teamwork, and interpersonal skills.

Nice-to-haves

• Knowledge in DFT, BIST, scan architecture, fault analysis, clocking, boot/reset flows, and ATE/SLT testing is nice to have.
• Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) is a plus.

Benefits

• Equity and benefits eligibility based on location and experience.