Server High Performance Compute Microarchitecture Lead

$233,000 - $349,600/Yr

Qualcomm - Austin, TX

Full-time - Senior

Austin, TX

Computer and Electronic Product Manufacturing

About the position

The Server High Performance Compute Microarchitecture Lead at Qualcomm is a pivotal role focused on developing high-performance, energy-efficient server solutions for data center applications. This position requires collaboration with a team of engineers to architect and design complex CPU systems, optimizing for power, performance, and area efficiency. The ideal candidate will have extensive experience in CPU architecture and microarchitecture, particularly in designing coherent caches and protocols, and will play a key role in shaping the next generation of CPU systems.

Responsibilities

• Take on a leadership role in developing the micro-architecture of CPU Caches and Directory solutions.
• Develop High-Level Architecture and Micro-Architecture specifications that can translate to RTL design.
• Deliver successful RTL design in collaboration with Design Verification and Physical Design teams.
• Prepare and present clear and comprehensive technical documentation to meet the needs of stakeholders, including engineering teams, senior management and internal partners.

Requirements

• Bachelor's degree in Computer Science/Engineering, Electrical Engineering, or a related field.
• Over 10 years of experience in designing one or more functional blocks of a high performance CPU design.
• Over 5 years of experience in micro-architecture and/or design of a CPU L2/L3, coherency protocols, directory and home node.
• Deep expertise in the design of multi-GHz processors with focus on critical path optimization.
• Expertise in power management and debug features associated with high performance designs.
• Strong technical documentation skills, along with excellent written and verbal communication abilities.

Nice-to-haves

• Master's in Computer Science/Engineering, Electrical Engineering, or related field.
• 15+ years in CPU and/or SoC Design.
• Experience with ARM ISA and AMBA protocols including CHI.
• Experience in design of coherent interconnects is a plus.
• Experience with the design of power management components to meet the demands of a high performance CPU design.
• Proven track record in hyperscale data center solutions.

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Comprehensive benefits package designed to support success at work, at home, and at play.