Solutions Engineering, Staff Engineer

Synopsys - Austin, TX

Full-time - Mid Level

Austin, TX

Publishing Industries

About the position

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As a DFT Staff Solutions Engineer, you will be an innovative thinker with a passion for technology and a knack for problem-solving. With a strong background in Electrical or Computer Engineering, you will excel in Design for Test (DFT) methodologies and have extensive experience in digital IC design. You will thrive in a collaborative environment, working closely with customers to understand their needs and deliver cutting-edge solutions. Your ability to multitask and manage priorities will make you a valuable asset in fast-paced, project-oriented settings. You will be dedicated to customer success, providing technical support and training to ensure optimal satisfaction. Your excellent communication skills will enable you to interact effectively with end-users and managers alike, making you a trusted advisor and partner in their design and implementation journeys. In this role, you will provide expertise for test solutions during design planning, budgeting, and implementation. You will conduct test methodology design rules checking during RTL coding stages and implement and validate DFT techniques such as scan compression, core wrapping, and logic & memory Built-In Self-Test (BIST). You will generate and validate Automatic Test Pattern Generation (ATPG) patterns, including advanced fault models, and participate in customer design and flow reviews to ensure seamless integration. Analyzing and debugging diagnostics to resolve technical issues efficiently will be a key part of your responsibilities, along with prototyping and developing new Design for Test methodologies under the guidance of Solution Architects.

Responsibilities

• Providing expertise for test solutions during design planning, budgeting, and implementation.
• Conducting test methodology design rules checking during RTL coding stages.
• Implementing and validating DFT techniques such as scan compression, core wrapping, and logic & memory Built-In Self-Test (BIST).
• Generating and validating Automatic Test Pattern Generation (ATPG) patterns, including advanced fault models.
• Participating in customer design and flow reviews to ensure seamless integration.
• Analyzing and debugging diagnostics to resolve technical issues efficiently.
• Prototyping and developing new Design for Test methodologies under the guidance of Solution Architects.

Requirements

• BS in Electrical Engineering, Computer Engineering, or a related field, with 5-7 years of relevant experience, or MS with 3-5 years of relevant experience.
• Proficiency in RTL coding, DFT insertion, scan synthesis, ATPG, and MBIST architecture planning.
• Experience in pattern generation and silicon bring-up processes.
• Strong understanding of protocols like 1149.1, 1500, and 1687.
• Excellent problem-solving skills and the ability to analyze and debug complex issues.

Nice-to-haves

• Experience with customer interactions and technical support.
• Familiarity with advanced DFT methodologies and tools.
• Knowledge of the latest trends in digital IC design and testing.

Benefits

• Comprehensive health benefits
• Wellness programs
• Financial benefits including retirement plans
• Monetary and non-monetary rewards