L3HHCM20posted 16 days ago
Full-time • Mid Level
Fort Wayne, IN

About the position

This self-motivated individual will participate on a team to develop FPGA Firmware in the Space & Airborne Systems (SAS) Segment of L3Harris. The SAS Segment provides critical mission solutions for space and airborne domains with defense, intelligence, and commercial applications. As an FPGA design engineer, you will be directly involved in one or more of the areas of design, integration, and test of advanced satellite communication links, digital telemetry, signal processing, and/or encryption technology.

Responsibilities

  • Support proposal efforts in the estimation and planning of end-to-end FPGA development.
  • Decompose and allocate system and box-level requirements to FPGA requirements and specifications.
  • Assist in architecting solutions against requirements and implement those solutions in various FPGA technologies or platforms.
  • Follow, enforce, and refine consistent firmware development processes across FPGA designs.
  • Synthesize designs to targeted technologies and perform constraint driven place and route and analysis.
  • Generate design review and deliverable documentation including review packages, block diagrams, interface control documents, and test plans/procedures.
  • Conduct design peer reviews at various phases in the development process.
  • Ensure FPGA simulations verify performance, then integrate and test the FPGA on the circuit card assembly.
  • Generate procedures to validate hardware, and perform hardware testing and debug.

Requirements

  • Bachelors of Science Degree in Electrical/Computer Engineering with 6 years' professional experience or a Graduate degree and a minimum of 4 years' relevant professional experience. In lieu of a degree, minimum of 10 years' of prior related experience.
  • Ability to obtain a Secret security clearance.
  • 5+ years experience using VHDL.
  • 3+ years experience with the FPGA design process and the tools used to generate FPGA designs.

Nice-to-haves

  • Active Top Secret security clearance is preferred, but not required.
  • Build FPGAs with difficult timing and/or difficult routing constraints.
  • Develop FPGA requirements and specifications.
  • High speed memory interfaces and/or high speed SERDES interfaces.
  • Analog to Digital (AD) and Digital to Analog (DA) interfaces.
  • Experience with vendor tool suites such as Xilinx, Microsemi, or Intel.
  • Familiarity with Questasim simulator and Synopsys Synplify/Synplify Pro synthesis.
  • Possess the ability to interface with Hardware, Software, and Systems Engineering.
  • Version control tools (subversion, git, etc.).
  • Self-motivated individual with the ability to work and communicate effectively within a development group.

Benefits

  • Relocation assistance is available to qualified applicants.

Job Keywords

Hard Skills
  • Firmware
  • SAS
  • Segment
  • Serde
  • Software Systems
  • 032MD1JovOs5nfj8
  • 0sg9veAwzx qI5iF40h
  • 3briZ25AhzEB WbknUSyv
  • cGWFneZigt WCAK3lE0u9Y4IkD
  • eQCyzR FBvxTM69
  • F4gJGDhO qnOGlgy WfSzNwF4h8V
  • Gm3xv haUosvMRT
  • hOc9MLy VWaJX3IM
  • jHSLpZX5K ZdPMmXzO
  • JQImoMpb 2rYAsaP3
  • lvRLNXTd 2qFJ1PS
  • noSxM V8Bv2St
  • pn8uCFLAHNy KMoj fyNU0lPJG RnkdCsJz4tcM
  • QRKTWgH1D OzfSYBpd2i3e
  • sQ5Wtu1AOz m4UavJRuBIg1rY
  • Uyien5wf MEPd2LwgIsu0
  • wAo2ys9cK4Jix aj6qPmVKyGlFnCw
  • wWAmrFC842ytqo5K
  • xT0jiz3 gS67U9d2
Build your resume with AI

A Smarter and Faster Way to Build Your Resume

Go to AI Resume Builder
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service