Sr. Engineer, Systems and Hardware Validation
Ayar Labs•San Jose, CA
506d•$120,000 - $165,000
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About The Position
The Sr. Engineer, Systems and Hardware Validation at Ayar Labs is responsible for validating multi-wavelength sources and CMOS chiplet performance. This role involves both component level design validation and system performance assessment to ensure a seamless deployment of technology to customers. The engineer will engage in chip and laser characterization, troubleshooting, and resolving engineering challenges as products transition from initial release to customer release. A strong understanding of laser, photonics, CMOS, and system-level concepts is essential, along with experience in complex test and measurement techniques.
