Sr. RTL Design Engineer, Hardware Compute Group

Amazon - Boise, ID

Full-time - Mid Level

Boise, ID

Sporting Goods, Hobby, Musical Instrument, Book, and Miscellaneous Retailers

About the position

As a Senior RTL Design Engineer at Amazon Lab126, you will be part of an advanced architecture team focused on innovating hardware designs for high-profile consumer electronics. Your role will involve defining micro-architecture and implementing RTL for advanced functional blocks, participating in design verification, and collaborating with multi-disciplinary teams to develop world-class hardware devices.

Responsibilities

• Define the micro-architecture and implement RTL for advanced functional blocks.
• Participate in design verification and bring-up of blocks by writing assertions and debugging code.
• Develop detailed design specifications and documentation.
• Perform RTL coding and synthesis.
• Collaborate with partners and suppliers to optimize and customize products.
• Run industry standard code quality tools and address issues found.
• Participate in test plan and coverage reviews.

Requirements

• Master's degree in Electrical/Computer Engineering or related field.
• 5+ years of RTL development experience with a record of taping out production silicon.
• Experience with design development using Verilog/SystemVerilog.
• Experience in defining micro-architecture from architecture guidelines and model analysis.
• Experience in performance/power/area analysis and trade-offs.
• Proficient in design methodologies and EDA tools.
• Experience working with synthesis, timing closure, and design constraints.
• Excellent problem-solving and debugging skills.
• Ability to work collaboratively in a team environment and communicate technical ideas effectively.

Nice-to-haves

• PhD in Computer Science, Electrical Engineering, or related field.
• Experience with design of video/graphics pipeline and image processing algorithms.
• Familiarity with display panel and display driver IC technologies.
• Experience with ARM and various DSP ISA.
• Experience debugging system-level issues.
• Experience in entire design flow from architecture to final silicon.
• Good programming skills in C/C++ and scripting skills in Python, Tcl, and/or Perl.
• 10 years or more of practical experience.
• Experience with a wide variety of low power design techniques.
• Working experience with high performance industry standard buses like AMBA AXI4.
• Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains.
• Large breadth of knowledge from architecture through physical design.
• Knowledge of FPGA and emulation platforms.
• Knowledge of SoC architecture.
• Excellent verbal and written communication skills.

Benefits

• Health insurance coverage
• 401k retirement savings plan
• Paid holidays
• Flexible scheduling
• Professional development opportunities