Cadence Design Systems - San Jose, CA

posted about 2 months ago

Full-time - Intern
San Jose, CA
Professional, Scientific, and Technical Services

About the position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This internship opportunity is designed for students currently enrolled in a STEM or Electrical/Computer Engineering program, looking to gain hands-on experience in a major Silicon Valley leader. As part of Cadence Design Systems' World Field Organization (WFO), interns will work with best-in-class EDA tools, collaborate with technical experts, and support the sales team in a dynamic, innovative environment focused on silicon design and design automation. Interns will learn processes that are at the forefront of silicon technology and gain insights into how a company like Cadence operates, as well as how technical teams solve complex problems. The intern will participate in a cohort-based, three-month program that includes hands-on training in applications used for Digital Design/Simulation, Physical Design, Mixed-signal and Analog Layout, and Advanced Verification. Interns will learn from technical experts, sales executives, and application engineers who provide design services, technical sales, and customer support to Cadence's most advanced customers. Each intern will be responsible for completing a design project that utilizes Cadence applications for the design, analysis, and implementation of digital and analog blocks, adhering to a set of specifications. Interns will participate in design reviews, sharing their learnings with their cohort and technical management, with some prerequisite work required. This internship will provide experience in several key areas, including fundamentals in design, verification, HDLs, synthesis and timing, embedded software development, and HW/SW co-design and co-verification. Interns will also gain exposure to UNIX, C/C++, and scripting languages such as Perl, TCL, and Python, as well as digital physical design and implementation, sign-off for timing, IR drop, power analysis, and SI analysis. Additionally, interns will have the opportunity to network and participate in fun activities with the intern and recent college graduate community at Cadence.

Responsibilities

  • Participate in a cohort-based internship program for three months.
  • Engage in hands-on training in applications used for Digital Design/Simulation, Physical Design, Mixed-signal and Analog Layout, and Advanced Verification.
  • Complete a design project using Cadence applications for the design, analysis, and implementation of digital and analog blocks.
  • Participate in design reviews and share learnings with cohort and technical management.
  • Learn from technical experts, sales executives, and application engineers.

Requirements

  • Currently enrolled in a STEM or Electrical/Computer Engineering program.
  • Basic understanding of design, verification, HDLs, synthesis, and timing.
  • Familiarity with embedded software development and HW/SW co-design and co-verification.
  • Knowledge of UNIX, C/C++, and scripting languages such as Perl, TCL, and Python.
  • Understanding of digital physical design and implementation.

Nice-to-haves

  • Experience with sign-off for timing, IR drop, power analysis, and SI analysis.

Benefits

  • Hands-on training in advanced EDA tools.
  • Networking opportunities with interns and recent graduates.
  • Participation in fun activities with the intern community.
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