Wireless SoC Design Verification Engineer

$175,800 - $312,200/Yr

Apple - Sunnyvale, CA

Full-time - Mid Level

Sunnyvale, CA

Computer and Electronic Product Manufacturing

About the position

As a Design Verification Engineer at Apple, you will lead the verification of complex System on Chips (SoCs) and contribute to the development of state-of-the-art wireless systems. This role involves integrating sophisticated IP-level design verification environments, creating reusable test benches, and implementing methodologies to enhance the quality of tape-out readiness. You will collaborate with various product development teams to push the boundaries of wireless technology and improve customer experiences globally.

Responsibilities

• Understand details of High Efficiency SOC Architecture and standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power specifications, multi-processor systems, DDR, PCIe, Memory Controller Subsystems, USB, PLL, and secured boot schemes.
• Create coverage driven verification plans from specifications and refine them to achieve coverage targets.
• Architect UVM based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites to SOC level.
• Achieve targeted coverage and work with design, architecture, software, firmware, and external IP delivery teams to efficiently integrate and verify overall SOC design.
• Collaborate closely with DV methodology architects to improve verification flow.

Requirements

• BS degree in a relevant field with 10 years of relevant experience required.
• Dedicated/hands-on ASIC DV experience.
• Advanced knowledge of HVL methodology (UVM/OVM) with recent experience in UVM.
• Proven track record of working through the full ASIC cycle from concept to tape-out to bring-up.
• Experience taping out large SOC systems with embedded processor cores.
• Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI based bus architecture in UVM environment.
• In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, and HW/FW interaction verification.

Nice-to-haves

• Some experience with formal verification is a plus.
• Low Power Verification experience is a plus.
• Excellent communication and problem-solving skills.

Benefits

• Comprehensive medical and dental coverage
• Retirement benefits
• Discounted products and free services
• Reimbursement for certain educational expenses including tuition
• Discretionary bonuses or commission payments
• Relocation assistance
• Participation in Apple's Employee Stock Purchase Plan